Etching Method and Method for Manufacturing Dram Capacitor

ABSTRACT

There is provided an etching method which includes: preparing a target substrate having a silicon portion, a silicon nitride film and a silicon oxide film; and selectively etching the silicon portion with respect to the silicon nitride film and the silicon oxide film by supplying a fluorine-containing gas and an inert gas which stay in an excited state to the target substrate.

TECHNICAL FIELD

The present disclosure relates to an etching method for etching asilicon portion existing on a substrate and a method for manufacturing aDRAM capacitor.

BACKGROUND

In a manufacturing process of a semiconductor device, there is a processof etching and removing a silicon portion, for example, a polysiliconfilm existing on a substrate. Wet etching may be used to etch such asilicon portion. However, in cases where a fine pattern remains afteretching a silicon portion, patterning may occur during drying performedafter wet etching. As such, dry etching may be required instead of wetetching in some cases.

Existing techniques for performing dry etching on an etching targetportion such as a polysilicon film or the like include using HF gas+F₂gas, or FNO gas+F₂ gas+inert gas (Patent Document 1); or using F₂gas+NH₃ gas (Patent Document 2).

PRIOR ART DOCUMENTS Patent Documents

Patent Document 1: Japanese laid-open publication No. 2014-236055

Patent Document 2: Japanese laid-open publication No. 2016-143781

Incidentally, when etching a silicon portion such as a polysilicon filmor the like in a semiconductor wafer (silicon wafer) which is a targetsubstrate, it is not only required that an etching rate is extremelyhigh, but also requires that selectivity be extremely high with respectto a coexisting silicon nitride (SiN) film, a coexisting silicon (SiO₂)film or the like. However, in the techniques of Patent Documents 1 and2, the etching rate and the selectivity may not be compatible at arequired level.

In a DRAM capacitor, there may be a case where a titanium-based filmsuch as a titanium nitride (TiN) film or the like as a lower electrodeis formed in a cylindrical shape on a sacrificial polysilicon film andthen the sacrificial polysilicon film is etched away. In this case, inaddition to the requirement for an extremely high etching rate, anextremely high selectivity is required not only for a SiN film or a SiO₂film but also for a titanium-based film.

SUMMARY

The present disclosure provides some embodiments of a technique foretching a silicon portion existing on a substrate at an extremely highetching rate and at an extremely high selectivity with respect to asilicon nitride film and a silicon oxide film.

Furthermore, the present disclosure provides some embodiments of anetching method and a method for manufacturing a DRAM capacitor, whichare capable of etching a silicon portion existing on a substrate at ahigh etching rate and an extremely high selectivity with respect to notonly a SiN film or a SiO₂ film but also a Ti-based film.

According to a first aspect of the present disclosure, there is providedetching method, including: preparing a target substrate includes asilicon portion, a silicon nitride film and a silicon oxide film; andselectively etching the silicon portion with respect to the siliconnitride film and the silicon oxide film by supplying afluorine-containing gas and an inert gas maintained in an excited stateto the target substrate.

In the first aspect, an etching rate for the silicon portion may be 100nm/min or greater, and an etching selectivity of the silicon portion tothe silicon nitride film and the silicon oxide film is 500 or greater.The fluorine-containing gas may be at least one selected from a groupconsisting of a hydrogen fluoride gas and a sulfur hexafluoride gas.

In the first aspect, the target substrate further includes a Ti-basedfilm. The method may include selectively etching the silicon portionwith respect to the Ti-based film. In this case, the fluorine-containinggas may be a hydrogen fluoride gas.

The inert gas may be at least one selected from a group consisting of anN₂ gas and an Ar gas. A volume ratio of the fluorine-containing gas andthe inert gas may be in a range of 10:1 to 1:10. A temperature of thetarget substrate at the time of etching may be in a range of 20 to 60degrees C. A pressure at the time of etching may be in a range of 66.5to 266 Pa.

According to a second aspect of the present disclosure, there isprovided a method for manufacturing a DRAM capacitor, including:preparing a semiconductor wafer having a structure in which anunderlying silicon oxide film is formed on a semiconductor substrate, asacrificial polysilicon film is formed on the silicon oxide film, aplurality of columnar recesses is formed in the sacrificial polysiliconfilm, a plurality of cylindrical TiN films serving as lower electrodesare formed in the respective columnar recesses and a silicon nitridefilm for supporting the cylindrical TiN films is formed on thesacrificial polysilicon film; and selectively etching the sacrificialpolysilicon film by supplying a hydrogen fluoride gas and an inert gaswhich are maintained in an excited state to the semiconductor wafer sothat the plurality of cylindrical TiN films are allowed to remain as thelower electrodes for DRAM capacitors supported by the silicon nitridefilm.

According to a third aspect of the present disclosure, there is provideda storage medium operating on a computer and storing a program forcontrolling an etching apparatus, wherein the program, when executed,causes the computer to control the etching apparatus so as to performthe etching method according to the first aspect.

According to the present disclosure, in a substrate including a siliconportion, a silicon nitride film and a silicon oxide film, whenselectively etching the silicon portion with respect to the siliconnitride film and the silicon oxide film, a fluorine-containing gas andan inert gas are supplied to the substrate in an excited state, wherebythe silicon portion existing on the substrate can be etched at anextremely high etching rate and at an extremely high selectivity withrespect to a SiN film and a SiO₂ film.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a schematic configuration diagram illustrating an example of aprocessing system equipped with an etching apparatus for performing anetching method according to an embodiment of the present disclosure.

FIG. 2 is a sectional view illustrating a heat treatment apparatusinstalled in the processing system of FIG. 1.

FIG. 3 is a sectional view illustrating an etching apparatus installedin the processing system of FIG. 1 and configured to perform the etchingmethod according to an embodiment of the present disclosure.

FIGS. 4A and 4B are views illustrating a structural example of a deviceto which the present disclosure is applied, wherein FIG. 4A shows astate before etching and FIG. 4B shows a state after etching.

FIG. 5 is a diagram illustrating a relationship between an etching rateof a silicon portion and a selectivity (Si/SiN) in an experimentalexample.

DETAILED DESCRIPTION

Embodiments of the present disclosure will now be described in detailwith reference to the drawings.

<Processing System>

FIG. 1 is a schematic configuration diagram showing an example of aprocessing system equipped with an etching apparatus for performing anetching method according to an embodiment of the present disclosure. Aprocessing system 1 includes a loading/unloading part 2 through which asemiconductor wafer (hereinafter simply referred to as a wafer) W as atarget substrate is transferred, two load lock chambers (L/L) 3 providedadjacent to the loading/unloading part 2, respective heat treatmentapparatuses 4 provided adjacent to the load lock chambers 3 andconfigured to perform a heat treatment on the wafer W, respectiveetching apparatuses 5 provided adjacent to the heat treatmentapparatuses 4 and configured to perform etching on the wafer W, and acontrol part 6.

The loading/unloading part 2 includes a transfer chamber (L/M) 12 inwhich a first wafer transfer mechanism 11 for transferring the wafer Wis provided. The first wafer transfer mechanism 11 includes two transferarms 11 a and 11 b configured to hold the wafer W in a substantiallyhorizontal posture. A carrier mounting table 13 is provided at a oneside of the transfer chamber 12 in a longitudinal direction. Forexample, three carriers C capable of accommodating a plurality of wafersW arranged side by side are configured to be connected to the carriermounting table 13. An orienter 14 configured to optically measure aneccentricity amount by rotating the wafer W and configured to performpositioning is provided adjacent to the transfer chamber 12.

In the loading/unloading part 2, the wafer W is held by the transfer arm11 a or 11 b. With the operation of the first wafer transfer mechanism11, the wafer W is linearly moved in a substantially horizontal planeand is moved up and down, whereby the wafer W is transferred to adesired position. The wafer W is subsequently loaded and unloaded as thetransfer arm 11 a or 11 b moves toward or away from the carrier Cmounted on the carrier mounting table 13, the orienter 14 and the loadlock chambers 3.

Each of the load lock chambers 3 is connected to the transfer chamber 12in a state in which a gate valve 16 is interposed between the respectiveload lock chamber 3 and the transfer chamber 12. A second wafer transfermechanism 17 for transferring the wafer W is provided in each of theload lock chambers 3. In addition, the load lock chamber 3 is configuredto be evacuated to a predetermined level of vacuum.

The second wafer transfer mechanism 17 includes an articulated armstructure and includes a pick configured to hold the wafer W in asubstantially horizontal posture. In this second wafer transfermechanism 17, the pick is positioned inside the load lock chamber 3 withthe articulated arm kept in a contracted state. The pick can reach theheat treatment apparatus 4 by extending the articulated arm and canreach the etching apparatus 5 by further extending the articulated arm.The second wafer transfer mechanism 17 can transfer the wafer W betweenthe load lock chamber 3, the heat treatment apparatus 4 and the etchingapparatus 5.

As shown in FIG. 2, the heat treatment apparatus 4 includes a vacuumablechamber 20 and a mounting table 23 installed inside the chamber 20 andconfigured to mount the wafer W thereon. A heater 24 is buried in themounting table 23. The wafer W subjected to an etching process is heatedby the heater 24 to vaporize and remove etching residues existing on thewafer W. A loading/unloading port 20 a through which the wafer is loadedinto or unloaded from the load lock chamber 3 is formed at the side ofthe load lock chamber 3 in the chamber 20. The loading/unloading port 20a can be opened and closed by a gate valve 22. A loading/unloading port20 b through which the wafer W is loaded into or unloaded from theetching apparatus 5 is formed at the side of the etching apparatus 5 inthe chamber 20. The loading/unloading port 20 b can be opened and closedby a gate valve 54. A gas supply channel 25 is connected to an upperportion of the sidewall of the chamber 20. The gas supply channel 25 maybe connected to an N₂ gas supply source 30. An exhaust path 27 isconnected to a bottom wall of the chamber 20. The exhaust path 27 isconnected to a vacuum pump 33. A flow rate regulation valve 31 isprovided in the gas supply channel 25. A pressure regulation valve 32 isprovided in the exhaust path 27. By adjusting these valves, the interiorof the chamber 20 is maintained in an N₂ gas atmosphere having apredetermined pressure to perform a heat treatment. An inert gas otherthan the N₂ gas, for example, an Ar gas, may be used.

The etching apparatus 5 is provided to selectively etch a siliconportion of the wafer W. Specific configurations thereof will bedescribed later in detail.

The control part 6 includes a process controller 91 equipped with a CPUfor controlling the respective constituent parts of the processingsystem 1. A user interface 92 including a keyboard through which anoperator inputs commands and the like to manage the processing system 1and a display for visually displaying an operational status of theprocessing system 1 is connected to the process controller 91.Furthermore, a memory part 93 for storing a process recipe which is acontrol program for realizing various processes to be executed in theprocessing system 1, for example, the supply of a processing gas in theetching apparatus 5 to be described later, the evacuation of thechamber, and the like under the control of the process controller 91,various databases, and so forth are connected to the process controller91. The recipe is stored in an appropriate storage medium (not shown) inthe memory part 93. If necessary, an arbitrary recipe is retrieved fromthe memory part 93 and is executed by the process controller 91, wherebya desired process in the processing system 1 is performed under thecontrol of the process controller 91.

In the processing system 1, in a state where the gate valve 16 locatedat the atmospheric side is opened, one sheet of wafer W is transferredfrom the carrier C of the loading/unloading part 2 into the load lockchamber 3 by one of the transfer arms 11 a and 11 b of the first wafertransfer mechanism 11, and is delivered to the pick of the second wafertransfer mechanism 17 inside the load lock chamber 3.

Thereafter, the gate valve 16 located at the atmospheric side is closedto evacuate the interior of the load lock chamber 3. Subsequently, thegate valve 54 is opened, and the pick is extended up to the etchingapparatus 5 to transfer the wafer W into the etching apparatus 5.

Thereafter, the pick is returned to the load lock chamber 3, the gatevalve 54 is closed, and an etching process is performed in the etchingapparatus 5 as described later.

Following the etching process, the gate valves 22 and 54 are opened, thewafer W subjected to the etching process is transferred to the heattreatment apparatus 4 by the pick of the second wafer transfer mechanism17. While introducing an N₂ gas into the chamber 20, the wafer W mountedon the mounting table 23 is heated by the heater 24 so that the etchingresidues and the like are removed by the heating.

Once the heat treatment in the heat treatment apparatus 4 is completed,the gate valve 22 is opened. The wafer W mounted on the mounting table23, which has been subjected to the heat treatment, is withdrawn andmoved to the load lock chamber 3 by the pick of the second wafertransfer mechanism 17, and is returned to the carrier C by one of thetransfer arms 11 a and 11 b of the first wafer transfer mechanism 11. Inthis way, the processing of one sheet of wafer is completed.

In the processing system 1, the heat treatment is not essential. In thiscase, the heat treatment apparatus 4 may be omitted. In the case wherethe heat treatment apparatus 4 is not provided, the wafer W subjected tothe etching process may be withdrawn and moved to the load lock chamber3 by the pick of the second wafer transfer mechanism 17, and may bereturned to carrier C by one of the transfer arms 11 a and 11 b of thefirst wafer transfer mechanism 11.

<Configuration of Etching Apparatus>

Next, the etching apparatus 5 for carrying out the etching method of thepresent embodiment will be described in detail. FIG. 3 is a sectionalview showing the etching apparatus 5. As shown in FIG. 3, the etchingapparatus 5 includes a chamber 40 having a hermetically sealedstructure. Inside the chamber 40, there is provided a mounting table 42for mounting the wafer W thereon in a substantially horizontal posture.In addition, the etching apparatus 5 includes a gas supply mechanism 43configured to supply an etching gas to the chamber 40, and an exhaustmechanism 44 configured to exhaust the interior of the chamber 40.

The chamber 40 is composed of a chamber body 51 and a lid 52. Thechamber body 51 includes a substantially cylindrical sidewall portion 51a and a bottom portion 51 b. An upper portion of the chamber body 51 isdefined as an opening which is closed by the lid 52. The sidewallportion 51 a and the lid 52 are hermetically sealed by a seal member(not shown), thus securing airtightness with respect to the interior ofthe chamber 40.

The lid 52 includes a lid member 55 constituting an outer shell, and ashower head 56 fitted inside the lid member 55 and provided so as toface the mounting table 42. The shower head 56 includes a main body 57having a cylindrical sidewall 57 a and an upper wall 57 b, and a showerplate 58 provided at the bottom of the main body 57. A space 59 isformed between the main body 57 and the shower plate 58.

A gas introduction path 61 extending to the space 59 is formed in thelid member 55 and the upper wall 57 b of the main body 57. A gas supplypipe 71 of the gas supply mechanism 43 is connected to the gasintroduction path 61.

A plurality of gas discharge holes 62 is formed in the shower plate 58.The gas introduced into the space 59 via the gas supply pipe 71 and thegas introduction path 61 is discharged from the gas discharge holes 62into an internal space of the chamber 40.

The sidewall portion 51 a is provided with a loading/unloading port 53through which the wafer W is loaded into or unloaded from the chamber 20of the heat treatment apparatus 4. The loading/unloading port 53 can beopened and closed by the gate valve 54.

The mounting table 42 is substantially circular in plan view and isfixed to the bottom portion 51 b of the chamber 40. A temperatureregulator 65 for regulating a temperature of the mounting table 42 isprovided inside the mounting table 42. The temperature regulator 65 isprovided with a conduit through which, for example, a temperatureregulating medium (e.g., water) circulates. Heat exchange is performedwith the temperature regulating medium flowing through such a conduit,whereby the temperature of the mounting table 42 is adjusted so that thetemperature of the wafer W mounted on the mounting table 42 iscontrolled.

The gas supply mechanism 43 includes a fluorine (F)-containing gassupply source 75 for supplying a fluorine-containing gas and an inertgas supply source 76 for supplying an inert gas. One end of anF-containing gas supply pipe 72 and one end of an inert gas supply pipe73 are connected to the F-containing gas supply source 75 and the inertgas supply source 76, respectively. In each of the F-containing gassupply pipe 72 and the inert gas supply pipe 73, there is provided aflow rate controller 79 for performing an opening/closing operation ofthe respective pipe and a flow rate control operation. The flow ratecontroller 79 is composed of, for example, an opening/closing valve anda mass flow controller. The other end of the F-containing gas supplypipe 72 and the other end of the inert gas supply pipe 73 are connectedto a gas excitation part 77 for exciting a gas. The gas supply pipe 71described above is connected to the gas excitation part 77.

Accordingly, the fluorine-containing gas and the inert gas supplied fromthe F-containing gas supply source 75 and the inert gas supply source 76to the gas excitation part 77 via the fluorine-containing gas supplypipe 72 and the inert gas supply pipe 73, respectively, are excited inthe gas excitation part 77. The fluorine-containing gas and the inertgas thus excited are supplied into the shower head 56 via the gas supplypipe 71 and are discharged from the gas discharge holes 62 of the showerhead 56 toward the wafer W inside the chamber 40.

The configuration of the gas excitation part 77 is not particularlylimited as long as the gas excitation part 77 can excite the gas. Forexample, as shown in the figure, it is possible to use, among others, aremote plasma generator for generating plasma of the fluorine-containinggas and plasma of the inert gas by an appropriate method and guiding thegenerated plasma to the chamber 40. In some embodiments, plasma of thefluorine-containing gas and plasma of the inert gas may be generatedinside the shower head 56 by other methods, and the generated plasma maybe introduced into the chamber 40. In some embodiments, plasma may begenerated inside the chamber 40 by other methods. In some embodiments,plasma may be directly generated inside the chamber 40 by using, forexample, microwave plasma generated by introducing microwaves into thechamber 40, inductively coupled plasma, or capacitively coupled plasmarepresented by parallel plate type plasma.

Among these gases, the F-containing gas is a reaction gas, and the inertgas is a dilution gas. By supplying and plasmarizing these gases in apredetermined ratio, it is possible to obtain a desired etchingperformance.

As the F-containing gas, it may be possible to suitably use a hydrogenfluoride (HF) gas or a sulfur hexafluoride (SF₆). Of these, the HF gasis preferable. As the inert gas, it may be possible to suitably use anN₂ gas or an Ar gas. Other noble gases such as an He gas and the likemay also be used.

The exhaust mechanism 44 includes an exhaust pipe 82 connected to anexhaust port 81 formed in the bottom portion 51 b of the chamber 40. Theexhaust mechanism 44 further includes an automatic pressure controlvalve (APC) 83 and configured to control an internal pressure of thechamber 40, and a vacuum pump 84 configured to exhaust the interior ofthe chamber 40, which are provided in the exhaust pipe 82.

In the sidewall of the chamber 40, two capacitance manometers 86 a and86 b used as pressure gauges to measure the internal pressure of thechamber 40 are provided so as to be inserted into the chamber 40. Thecapacitance manometer 86 a is used to measure high pressure while thecapacitance manometer 86 b is used to measure low pressure. Atemperature sensor (not shown) for detecting a temperature of the waferW is provided in the vicinity of the wafer W mounted on the mountingtable 42.

Al is used as a material for various components such as the chamber 40,the mounting table 42 and the like that constitute the etching apparatus5. The Al material constituting the chamber 40 may be a pure Al materialor may have an anodized inner surface (an inner surface of the chamberbody 51 or the like). On the other hand, the surface of Al constitutingthe mounting table 42 requires wear resistance. Therefore, an oxide film(Al₂O₃ film) having high wear resistance may be in some embodimentsformed on the surface of the aluminum material by anodizing the Almaterial.

<Etching Method Using Etching Apparatus>

Next, an etching method using the etching apparatus configured as abovewill be described.

In this example, as the wafer W, a wafer having a silicon portion (apolysilicon film or the like) to be etched and having a SiN film and aSiO₂ film formed adjacent thereto is used.

The carrier C is mounted on the carrier mounting table 13 of theprocessing system 1 while accommodating such a wafer W. While openingthe atmospheric-side gate valve 16, one sheet of wafer W is transferredfrom the carrier C of the loading/unloading part 2 to the load lockchamber 3 by one of the transfer arms 11 a and 11 b of the first wafertransfer mechanism 11, and is delivered to the pick of the second wafertransfer mechanism 17 in the load lock chamber 3.

Subsequently, the atmospheric-side gate valve 16 is closed and theinterior of the load lock chamber 3 is evacuated. Then, the gate valves22 and 54 are opened, and the pick is extended up to the etchingapparatus 5 to mount the wafer W on the mounting table 42.

Thereafter, the pick is returned to the load lock chamber 3, the gatevalve 54 is closed, and the interior of the chamber 40 is hermeticallysealed. In this state, the temperature of the wafer W on the mountingtable 42 is regulated to a predetermined target value by the temperatureregulator 65. An F-containing gas and an inert gas are supplied from theF-containing gas supply source 75 and the inert gas supply source 76 ofthe gas supply mechanism 43 to the gas excitation part 77 via theF-containing gas supply pipe 72 and the inert gas supply pipe 73,respectively. These gases are excited in the gas excitation part 77. TheF-containing gas and the inert gas thus excited are supplied into theshower head 56 via the gas supply pipe 71 and are discharged from thegas discharge holes 62 of the shower head 56 toward the wafer W insidethe chamber 40. Thus, the silicon portion of the wafer W is etched.

In this case, the F-containing gas used as an etching gas isappropriately diluted with the inert gas. The F-containing gas and theinert gas are supplied to the wafer W in the excited state, whereby thesilicon portion such as a polysilicon film or the like can be etched ata high etching rate and at a high selectivity with respect to the SiNfilm and the SiO₂ film. Specifically, the etching rate of the siliconportion such as a polysilicon film or the like may be set to 100 nm/minor more, and the etching selectivity of the SiN film and the SiO₂ filmwith respect to the silicon portion may be set to 300 or more.

As the F-containing gas, an HF gas or an SF₆ gas may suitably be used.By using these gases, it is possible to realize etching at a highetching rate and a high selectivity so that the etching rate of thesilicon portion is 120 nm/min or more and the selectivity of the SiNfilm and the SiO₂ film to the silicon portion is 500 or more.

In particular, when a titanium-based film such as a TiN film or the likefurther exists on a wafer W having a silicon portion (a polysilicon filmor the like) to be etched and having a SiN film and a SiO₂ film formedadjacent thereto, it is required to have a high selectivity even for theTi-based film. By using an HF gas as the F-containing gas, it ispossible to obtain a high selectivity of 500 or more even for theTi-based films such as a TiN film or the like. As the Ti-based film, inaddition to the TiN film, it may be possible to use a Ti film, a TiONfilm, a TiCN film, or the like.

The internal pressure of the chamber in the etching process may fallwithin a range of 66.5 to 266 Pa (0.5 to 2 Torr). The temperature(≈wafer temperature) of the mounting table 42 may fall within a range of20 to 60 degrees C., specifically around 30 degrees C. A volume ratio(flow rate ratio or partial pressure ratio) of the F-containing gas andthe inert gas may fall within a range of 10:1 to 1:10, specifically arange of 5:1 to 1:1. For example, F containing gas: inert gas may be3:1.

<Structural Example of Applied Device>

Next, a structural example of a device to which the present disclosureis applied will be described with reference to FIGS. 4A and 4B. In thisexample, the etching method is used for etching in a process of forminga TiN cylinder (lower electrode) of a DRAM capacitor. A wafer W wasprepared which has a structure in which, as shown in FIG. 4A, anunderlying SiO₂ film 201 is formed on a silicon substrate (not shown), asacrificial polysilicon film 202 is formed on the SiO₂ film 201, aplurality of columnar recesses 203 having a high aspect ratio are formedin the sacrificial polysilicon film 202, cylindrical TiN films 204serving as lower electrodes are formed in the respective recesses 203,and a SiN film 205 for supporting cylinders is formed on the sacrificialpolysilicon film 202. The sacrificial polysilicon film 202 is etchedaway by the above etching method. Thus, as shown in FIG. 4B, thecylindrical TiN films 204 are left on the underlying SiO₂ film 201, andTiN cylinders (lower electrodes) of DRAM capacitors supported by the SiNfilm 205 are formed.

Experimental Example

Next, experiment examples will be described. A wafer having thestructure shown in FIG. 4A was prepared. First, HF gas was used as theF-containing gas, N₂ gas was used as the inert gas. A polysilicon filmwas etched by plasmarizing the HF gas and the N₂ gas (in a firstetching). In conditions applied at this time, the wafer temperature was35 degrees C., the pressure was 133 Pa (1 Torr), a flow rate of the HFgas was 200 to 1,000 sccm, a flow rate of the N₂ gas was 50 to 500 sccm,and plasma generation power was 400 W. Subsequently, SF₆ gas was used asthe F-containing gas, Ar gas was used as the inert gas. Etching wasperformed by plasmarizing the SF₆ gas and the Ar gas (in a secondetching). In conditions applied at this time, the wafer temperature was35 degrees C., the pressure was 66.6 Pa (0.5 Torr), a flow rate of theSF₆ gas was 50 to 300 sccm, a flow rate of the Ar gas was 500 to 1,000sccm, and the plasma generation power was 400 W. For comparison, F₂ gasand NH₃ gas were used as the etching gases, and etching was performedwithout plasmarizing the F₂ gas and the NH₃ gas (in a third etching). Inconditions applied at this time, the wafer temperature was 90 degreesC., the pressure was 573.3 Pa (4.3 Torr), a flow rate of the F₂ gas was500 to 1,500 sccm, and a flow rate of the NH₃ gas was 5 to 30 sccm.

Even in any of these etching processes, the selectivity of thepolysilicon film to the SiO₂ film was at a high level of 500 or more. Inaddition, the relationship between the etching rate of the polysiliconfilm and the selectivity (Si/SiN) of the Si film to the SiN film inthese etching processes is as shown in FIG. 5. That is to say, in thecase of “the third etching” as a conventional example in which etchingwas performed using the F₂ gas and the NH₃ gas without plasmarizingthem, the etching of the SiN film resulted in a selectivity (Si/SiN) of80 which leads to inadequate results. This is presumably becausereaction products generated when etching the polysilicon etch the SiNfilm. Furthermore, the etching rate was less than 100 nm/min and wasstill insufficient. On the other hand, in “the first etching” using theplasma of the HF gas and the N₂ gas and “the second etching” using theplasma of the SF₆ gas and the Ar gas, the selectivity (Si/SiN) was 500and the etching rate of the polysilicon film was 120 nm/min or more,which satisfies the requirements of selectivity (Si/SiN) of 500 and theetching rate of 100 nm/min or more.

On the other hand, in the case of “the first etching” using the plasmaof the HF gas and the N₂ gas, the TiN film was not damaged even whenover-etching the polysilicon film. However, in the case of “the secondetching” using the plasma of the SF₆ gas and the Ar gas, slight damagewas generated in the upper portion of the TiN film when over-etching thepolysilicon film. From this result, it was confirmed that “the firstetching” using the plasma of the HF gas and the N₂ gas is preferablewhen the etching selectivity to the TiN film is also taken intoconsideration.

Other Applications

While the embodiment of the present disclosure has been described above,the present disclosure is not limited to the above-described embodiment.Various modifications may be made without departing from the spiritthereof.

For example, the apparatus of the above-described embodiment is nothingmore than an example. The etching method of the present disclosure maybe carried out by various apparatuses.

In addition, although there has been shown a case where thesemiconductor wafer is used as the target substrate, the substrate isnot limited to the semiconductor wafer but may be other substrates suchas an FPD (flat panel display) substrate represented by a substrate forLCD (liquid crystal display), a ceramic substrate, and the like.

Furthermore, in the above-described embodiment, the etching of thesacrificial polysilicon of the DRAM capacitor has been described as anapplication example. However, the present disclosure is not limitedthereto and may be applied to other uses such as polysilicon removal ina logic fin-FET process, Si resizing, and the like.

Furthermore, although a polysilicon film has been exemplified as asilicon portion of an object to be processed, the present disclosure isnot limited thereto but may be applied to other silicon portions such asa silicon substrate, an epitaxially grown silicon crystal, and the like.

EXPLANATION OF REFERENCE NUMERALS

1: processing system, 2: loading/unloading part, 3: load lock chamber,4: heat treatment apparatus, 5: etching apparatus, 6: control part, 11:first wafer transfer mechanism, 17: second wafer transfer mechanism, 40:chamber, 42: mounting table, 43: gas supply mechanism, 44: exhaustmechanism, 56: shower head, 71: gas supply pipe, 72: F-containing gassupply pipe, 73: inert gas supply pipe, 75: F-containing gas supplysource, 76: inert gas supply source, 77: gas excitation part, W:semiconductor wafer

What is claimed is:
 1. An etching method, comprising: preparing a targetsubstrate includes a silicon portion, a silicon nitride film and asilicon oxide film; and selectively etching the silicon portion withrespect to the silicon nitride film and the silicon oxide film bysupplying a fluorine-containing gas and an inert gas maintained in anexcited state to the target substrate.
 2. The method of claim 1, whereinan etching rate for the silicon portion is 100 nm/min or greater, and anetching selectivity of the silicon portion to the silicon nitride filmand the silicon oxide film is 300 or greater.
 3. The method of claim 1,wherein the fluorine-containing gas is at least one selected from agroup consisting of a hydrogen fluoride gas and a sulfur hexafluoridegas.
 4. The method of claim 1, wherein the target substrate furtherincludes a Ti-based film, the method comprising: selectively etching thesilicon portion with respect to the Ti-based film.
 5. The method ofclaim 4, wherein the fluorine-containing gas is a hydrogen fluoride gas.6. The method of claim 1, wherein the inert gas is at least one selectedfrom a group consisting of an N₂ gas and an Ar gas.
 7. The method ofclaim 1, wherein a volume ratio of the fluorine-containing gas and theinert gas is in a range of 10:1 to 1:10.
 8. The method of claim 1,wherein a temperature of the target substrate at the time of etching isin a range of 20 to 60 degrees C.
 9. The method of claim 1, wherein apressure at the time of etching is in a range of 66.5 to 266 Pa.
 10. Amethod for manufacturing a DRAM capacitor, comprising: preparing asemiconductor wafer having a structure in which an underlying siliconoxide film is formed on a semiconductor substrate, a sacrificialpolysilicon film is formed on the silicon oxide film, a plurality ofcolumnar recesses is formed in the sacrificial polysilicon film, aplurality of cylindrical TiN films serving as lower electrodes areformed in the respective columnar recesses and a silicon nitride filmfor supporting the cylindrical TiN films is formed on the sacrificialpolysilicon film; and selectively etching the sacrificial polysiliconfilm by supplying a hydrogen fluoride gas and an inert gas which aremaintained in an excited state to the semiconductor wafer so that theplurality of cylindrical TiN films are allowed to remain as the lowerelectrodes for DRAM capacitors supported by the silicon nitride film.11. A storage medium operating on a computer and storing a program forcontrolling an etching apparatus, wherein the program, when executed,causes the computer to control the etching apparatus so as to perform anetching method which comprises: preparing a target substrate whichincludes a silicon portion, a silicon nitride film and a silicon oxidefilm; and selectively etching the silicon portion with respect to thesilicon nitride film and the silicon oxide film by supplying afluorine-containing gas and an inert gas which are maintained in anexcited state to the target substrate.